POWER Instruction Set Architecture
POWER runs mission-critical IBM mainframe-class workloads. Required for AIX, IBM i (AS/400), and Linux-on-POWER development, and for anyone building compilers or tools targeting POWER.
What It Defines
Defines the IBM POWER instruction set: base integer and floating-point operations, AltiVec/VMX and VSX SIMD extensions, Power ISA 3.1 prefixed instructions (8-byte), the hypervisor (PHYP) and privileged architecture, and the SPE embedded profile. POWER10 implements ISA v3.1B. Deployed on IBM POWER10 enterprise servers (AIX, IBM i, Linux) and Raptor Computing's Talos open-hardware workstations.
Canonical (Normative)
Convenient (Practical)
Linux Foundation project that stewards the open POWER Instruction Set Architecture. Originally created by IBM, Google, Nvidia, Mellanox, and Tyan. Publishes the POWER ISA, OpenCAPI interconnect, and OpenFirmware (IEEE 1275) specifications. IBM POWER10 servers and Raptor Computing's Talos workstations are the primary open-hardware implementations.
Related Specs
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